mirror of
https://github.com/Keychron/qmk_firmware.git
synced 2024-12-27 11:38:58 +06:00
457042f179
* Add default mode eighty firmware * Add via keymap * Mode80 firmware upgrades - Removed SPI and PWM drivers from MCU configuration, HAL configuration and Chibi configuration as neither peripherals are being used - Included second backspace key (row 5, col 14) which should solve the non-appearance of the backspace key on the hotswap PCB * Add default mode eighty firmware * Add via keymap * Update keyboards/mode/eighty/config.h Remove comment lines from config.h Co-authored-by: Ryan <fauxpark@gmail.com> * Update keyboards/mode/eighty/config.h Remove comments from config.h Co-authored-by: Ryan <fauxpark@gmail.com> * Update eighty.c Add GPLv2 header * Update eighty.h Add GPLv2 license header * Update readme.md Update README * Update keyboards/mode/eighty/config.h Remove keyboard description Co-authored-by: Drashna Jaelre <drashna@live.com> * Delete config.h Delete config.h in keynap folder * Update keyboards/mode/eighty/rules.mk Remove feature disabling in rules.mk Co-authored-by: Ryan <fauxpark@gmail.com> * Move rules.mk to VIA folder * Update keyboards/mode/eighty/keymaps/via/rules.mk Use LTO_ENABLE as short for LINK_TIME_OPTIMIZATION_ENABLE Co-authored-by: Drashna Jaelre <drashna@live.com> * Update keyboards/mode/eighty/readme.md Puts a single image embedded in the readme, and links to the full gallery Co-authored-by: James Young <18669334+noroadsleft@users.noreply.github.com> * Update keyboards/mode/eighty/readme.md Use * for markdown list Co-authored-by: Ryan <fauxpark@gmail.com> * Apply suggestions from code review Correct comment characters Co-authored-by: Ryan <fauxpark@gmail.com> * Adjusted copyright name, USB descriptor and removed info.json * Separate Mode80 S and H firwares into subfolders * Added info.json files for QMK Configurator * Lowercase folder and filenames * Remove config definition macros in M80H * Remove config definition macros in M80S and root * Change definitions to lowercase parameters * Moce chconf and mcuconf chibiOS files to root folder * Move halconf to root folder, keymaps to subfolders * Update readme for building/flashing guide Co-authored-by: Ryan <fauxpark@gmail.com> * Add layers to VIA keymaps, remove CONSOLE_ENABLE * Push master changes to lib/ * Retrieve lufa and googletest submodules to previous heads at master * Disabled LTO in VIA keymaps * Fix layout declaration to lowercase in m80s default keymap * Added readme's for each M80S and M80H Co-authored-by: Jaicob <jaicob@icloud.com> Co-authored-by: Gondolindrim <alvaro.augusto.volpato@gmail.com> Co-authored-by: Ryan <fauxpark@gmail.com> Co-authored-by: Drashna Jaelre <drashna@live.com> Co-authored-by: James Young <18669334+noroadsleft@users.noreply.github.com>
177 lines
6.2 KiB
C
177 lines
6.2 KiB
C
/*
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ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License.
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*/
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#ifndef _MCUCONF_H_
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#define _MCUCONF_H_
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/*
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* STM32F0xx drivers configuration.
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* The following settings override the default settings present in
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* the various device driver implementation headers.
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* Note that the settings for each driver only have effect if the whole
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* driver is enabled in halconf.h.
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*
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* IRQ priorities:
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* 3...0 Lowest...Highest.
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*
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* DMA priorities:
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* 0...3 Lowest...Highest.
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*/
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#define STM32F0xx_MCUCONF
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// #define STM32F070xB
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/*
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* HAL driver system settings.
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*/
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#define STM32_NO_INIT FALSE
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#define STM32_PVD_ENABLE FALSE
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#define STM32_PLS STM32_PLS_LEV0
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#define STM32_HSI_ENABLED TRUE
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#define STM32_HSI14_ENABLED TRUE
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#define STM32_HSI48_ENABLED FALSE
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#define STM32_LSI_ENABLED TRUE
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#define STM32_HSE_ENABLED FALSE
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#define STM32_LSE_ENABLED FALSE
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#define STM32_SW STM32_SW_PLL
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#define STM32_PLLSRC STM32_PLLSRC_HSI_DIV2
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#define STM32_PREDIV_VALUE 1
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#define STM32_PLLMUL_VALUE 12
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#define STM32_HPRE STM32_HPRE_DIV1
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#define STM32_PPRE STM32_PPRE_DIV1
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#define STM32_ADCSW STM32_ADCSW_HSI14
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#define STM32_ADCPRE STM32_ADCPRE_DIV4
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#define STM32_MCOSEL STM32_MCOSEL_NOCLOCK
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#define STM32_ADCPRE STM32_ADCPRE_DIV4
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#define STM32_ADCSW STM32_ADCSW_HSI14
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#define STM32_USBSW STM32_USBSW_HSI48
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#define STM32_CECSW STM32_CECSW_HSI
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#define STM32_I2C1SW STM32_I2C1SW_HSI
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#define STM32_USART1SW STM32_USART1SW_PCLK
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#define STM32_RTCSEL STM32_RTCSEL_LSI
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/*
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* ADC driver system settings.
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*/
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#define STM32_ADC_USE_ADC1 FALSE
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#define STM32_ADC_ADC1_DMA_PRIORITY 2
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#define STM32_ADC_IRQ_PRIORITY 2
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#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 2
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/*
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* EXT driver system settings.
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*/
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#define STM32_EXT_EXTI0_1_IRQ_PRIORITY 3
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#define STM32_EXT_EXTI2_3_IRQ_PRIORITY 3
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#define STM32_EXT_EXTI4_15_IRQ_PRIORITY 3
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#define STM32_EXT_EXTI16_IRQ_PRIORITY 3
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#define STM32_EXT_EXTI17_IRQ_PRIORITY 3
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/*
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* GPT driver system settings.
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*/
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#define STM32_GPT_USE_TIM1 FALSE
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#define STM32_GPT_USE_TIM2 FALSE
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#define STM32_GPT_USE_TIM3 FALSE
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#define STM32_GPT_USE_TIM14 FALSE
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#define STM32_GPT_TIM1_IRQ_PRIORITY 2
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#define STM32_GPT_TIM2_IRQ_PRIORITY 2
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#define STM32_GPT_TIM3_IRQ_PRIORITY 2
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#define STM32_GPT_TIM14_IRQ_PRIORITY 2
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/*
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* I2C driver system settings.
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*/
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#define STM32_I2C_USE_I2C1 TRUE
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#define STM32_I2C_USE_I2C2 FALSE
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#define STM32_I2C_BUSY_TIMEOUT 50
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#define STM32_I2C_I2C1_IRQ_PRIORITY 3
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#define STM32_I2C_I2C2_IRQ_PRIORITY 3
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#define STM32_I2C_USE_DMA TRUE
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#define STM32_I2C_I2C1_DMA_PRIORITY 1
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#define STM32_I2C_I2C2_DMA_PRIORITY 1
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#define STM32_I2C_I2C1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7)
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#define STM32_I2C_I2C1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6)
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#define STM32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure")
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/*
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* ICU driver system settings.
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*/
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#define STM32_ICU_USE_TIM1 FALSE
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#define STM32_ICU_USE_TIM2 FALSE
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#define STM32_ICU_USE_TIM3 FALSE
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#define STM32_ICU_TIM1_IRQ_PRIORITY 3
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#define STM32_ICU_TIM2_IRQ_PRIORITY 3
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#define STM32_ICU_TIM3_IRQ_PRIORITY 3
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/*
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* PWM driver system settings.
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*/
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#define STM32_PWM_USE_ADVANCED FALSE
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#define STM32_PWM_USE_TIM1 FALSE
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#define STM32_PWM_USE_TIM2 FALSE
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#define STM32_PWM_USE_TIM3 FALSE
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#define STM32_PWM_TIM1_IRQ_PRIORITY 3
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#define STM32_PWM_TIM2_IRQ_PRIORITY 3
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#define STM32_PWM_TIM3_IRQ_PRIORITY 3
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/*
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* SERIAL driver system settings.
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*/
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#define STM32_SERIAL_USE_USART1 FALSE
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#define STM32_SERIAL_USE_USART2 FALSE
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#define STM32_SERIAL_USART1_PRIORITY 3
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#define STM32_SERIAL_USART2_PRIORITY 3
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/*
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* SPI driver system settings.
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*/
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#define STM32_SPI_USE_SPI1 FALSE
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#define STM32_SPI_USE_SPI2 FALSE
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#define STM32_SPI_SPI1_DMA_PRIORITY 1
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#define STM32_SPI_SPI2_DMA_PRIORITY 1
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#define STM32_SPI_SPI1_IRQ_PRIORITY 2
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#define STM32_SPI_SPI2_IRQ_PRIORITY 2
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#define STM32_SPI_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4)
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#define STM32_SPI_SPI2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5)
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#define STM32_SPI_DMA_ERROR_HOOK(spip) osalSysHalt("DMA failure")
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/*
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* ST driver system settings.
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*/
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#define STM32_ST_IRQ_PRIORITY 2
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#define STM32_ST_USE_TIMER 2
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/*
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* UART driver system settings.
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*/
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#define STM32_UART_USE_USART1 FALSE
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#define STM32_UART_USE_USART2 FALSE
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#define STM32_UART_USART1_IRQ_PRIORITY 3
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#define STM32_UART_USART2_IRQ_PRIORITY 3
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#define STM32_UART_USART1_DMA_PRIORITY 0
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#define STM32_UART_USART2_DMA_PRIORITY 0
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#define STM32_UART_DMA_ERROR_HOOK(uartp) osalSysHalt("DMA failure")
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/*
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* USB driver system settings.
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*/
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#define STM32_USB_USE_USB1 TRUE
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#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE
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#define STM32_USB_USB1_LP_IRQ_PRIORITY 3
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#endif /* _MCUCONF_H_ */
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