mirror of
https://github.com/Keychron/qmk_firmware.git
synced 2024-12-27 11:38:58 +06:00
eba3d68394
Co-authored-by: Drashna Jael're <drashna@live.com>
198 lines
5.4 KiB
C
198 lines
5.4 KiB
C
/* Copyright 2021 Colin Lam (Ploopy Corporation)
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* Copyright 2020 Christopher Courtney, aka Drashna Jael're (@drashna) <drashna@live.com>
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* Copyright 2019 Sunjun Kim
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* Copyright 2019 Hiroyuki Okada
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include "adns5050.h"
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#include "quantum.h"
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#include "wait.h"
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#ifdef CONSOLE_ENABLE
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# include "print.h"
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#endif
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#ifndef OPTIC_ROTATED
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# define OPTIC_ROTATED false
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#endif
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// Definitions for the ADNS serial line.
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// These really ought to be defined in your config.h, but defaults are
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// here if you're really lazy.
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#ifndef ADNS_SCLK_PIN
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# define ADNS_SCLK_PIN B7
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#endif
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#ifndef ADNS_SDIO_PIN
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# define ADNS_SDIO_PIN C6
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#endif
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#ifndef ADNS_CS_PIN
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# define ADNS_CS_PIN B4
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#endif
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#ifdef CONSOLE_ENABLE
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void print_byte(uint8_t byte) { dprintf("%c%c%c%c%c%c%c%c|", (byte & 0x80 ? '1' : '0'), (byte & 0x40 ? '1' : '0'), (byte & 0x20 ? '1' : '0'), (byte & 0x10 ? '1' : '0'), (byte & 0x08 ? '1' : '0'), (byte & 0x04 ? '1' : '0'), (byte & 0x02 ? '1' : '0'), (byte & 0x01 ? '1' : '0')); }
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#endif
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// Initialize the ADNS serial pins.
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void adns_init(void) {
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setPinOutput(ADNS_SCLK_PIN);
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setPinOutput(ADNS_SDIO_PIN);
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setPinOutput(ADNS_CS_PIN);
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}
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// Perform a synchronization with the ADNS.
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// Just as with the serial protocol, this is used by the slave to send a
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// synchronization signal to the master.
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void adns_sync(void) {
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writePinLow(ADNS_CS_PIN);
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wait_us(1);
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writePinHigh(ADNS_CS_PIN);
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}
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void adns_cs_select(void) {
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writePinLow(ADNS_CS_PIN);
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}
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void adns_cs_deselect(void) {
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writePinHigh(ADNS_CS_PIN);
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}
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uint8_t adns_serial_read(void) {
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setPinInput(ADNS_SDIO_PIN);
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uint8_t byte = 0;
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for (uint8_t i = 0; i < 8; ++i) {
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writePinLow(ADNS_SCLK_PIN);
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wait_us(1);
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byte = (byte << 1) | readPin(ADNS_SDIO_PIN);
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writePinHigh(ADNS_SCLK_PIN);
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wait_us(1);
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}
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return byte;
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}
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void adns_serial_write(uint8_t data) {
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setPinOutput(ADNS_SDIO_PIN);
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for (int8_t b = 7; b >= 0; b--) {
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writePinLow(ADNS_SCLK_PIN);
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if (data & (1 << b))
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writePinHigh(ADNS_SDIO_PIN);
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else
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writePinLow(ADNS_SDIO_PIN);
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wait_us(2);
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writePinHigh(ADNS_SCLK_PIN);
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}
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// tSWR. See page 15 of the ADNS spec sheet.
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// Technically, this is only necessary if the next operation is an SDIO
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// read. This is not guaranteed to be the case, but we're being lazy.
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wait_us(4);
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// Note that tSWW is never necessary. All write operations require at
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// least 32us, which exceeds tSWW, so there's never a need to wait for it.
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}
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// Read a byte of data from a register on the ADNS.
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// Don't forget to use the register map (as defined in the header file).
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uint8_t adns_read_reg(uint8_t reg_addr) {
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adns_cs_select();
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adns_serial_write(reg_addr);
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// We don't need a minimum tSRAD here. That's because a 4ms wait time is
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// already included in adns_serial_write(), so we're good.
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// See page 10 and 15 of the ADNS spec sheet.
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//wait_us(4);
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uint8_t byte = adns_serial_read();
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// tSRW & tSRR. See page 15 of the ADNS spec sheet.
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// Technically, this is only necessary if the next operation is an SDIO
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// read or write. This is not guaranteed to be the case.
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// Honestly, this wait could probably be removed.
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wait_us(1);
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adns_cs_deselect();
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return byte;
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}
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void adns_write_reg(uint8_t reg_addr, uint8_t data) {
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adns_cs_select();
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adns_serial_write( 0b10000000 | reg_addr );
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adns_serial_write(data);
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adns_cs_deselect();
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}
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report_adns_t adns_read_burst(void) {
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adns_cs_select();
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report_adns_t data;
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data.dx = 0;
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data.dy = 0;
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adns_serial_write(REG_MOTION_BURST);
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// We don't need a minimum tSRAD here. That's because a 4ms wait time is
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// already included in adns_serial_write(), so we're good.
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// See page 10 and 15 of the ADNS spec sheet.
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//wait_us(4);
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uint8_t x = adns_serial_read();
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uint8_t y = adns_serial_read();
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// Burst mode returns a bunch of other shit that we don't really need.
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// Setting CS to high ends burst mode early.
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adns_cs_deselect();
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data.dx = convert_twoscomp(x);
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data.dy = convert_twoscomp(y);
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return data;
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}
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// Convert a two's complement byte from an unsigned data type into a signed
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// data type.
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int8_t convert_twoscomp(uint8_t data) {
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if ((data & 0x80) == 0x80)
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return -128 + (data & 0x7F);
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else
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return data;
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}
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// Don't forget to use the definitions for CPI in the header file.
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void adns_set_cpi(uint8_t cpi) {
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adns_write_reg(REG_MOUSE_CONTROL2, cpi);
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}
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bool adns_check_signature(void) {
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uint8_t pid = adns_read_reg(REG_PRODUCT_ID);
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uint8_t rid = adns_read_reg(REG_REVISION_ID);
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uint8_t pid2 = adns_read_reg(REG_PRODUCT_ID2);
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return (pid == 0x12 && rid == 0x01 && pid2 == 0x26);
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}
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