mirror of
https://github.com/Keychron/qmk_firmware.git
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97 lines
2.8 KiB
C
97 lines
2.8 KiB
C
/*
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* This file is subject to the terms of the GFX License. If a copy of
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* the license was not distributed with this file, you can obtain one at:
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*
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* http://ugfx.org/license.html
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*/
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#ifndef _GDISP_LLD_BOARD_H
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#define _GDISP_LLD_BOARD_H
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#include "quantum.h"
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#define ST7565_LCD_BIAS ST7565_LCD_BIAS_7
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#define ST7565_COM_SCAN ST7565_COM_SCAN_DEC
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#define ST7565_PAGE_ORDER 0, 1, 2, 3
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/*
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* Custom page order for several LCD boards, e.g. HEM12864-99
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* #define ST7565_PAGE_ORDER 4,5,6,7,0,1,2,3
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*/
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#define ST7565_A0_PIN C7
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#define ST7565_RST_PIN C8
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#define ST7565_MOSI_PIN C6
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#define ST7565_SCLK_PIN C5
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#define ST7565_SS_PIN C4
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// DSPI Clock and Transfer Attributes
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// Frame Size: 8 bits
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// MSB First
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// CLK Low by default
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static const SPIConfig spi1config = {
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// Operation complete callback or @p NULL.
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.end_cb = NULL,
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// The chip select line port - when not using pcs.
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.ssport = PAL_PORT(ST7565_SS_PIN),
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// brief The chip select line pad number - when not using pcs.
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.sspad = PAL_PAD(ST7565_SS_PIN),
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// SPI initialization data.
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.tar0 = SPIx_CTARn_FMSZ(7) // Frame size = 8 bytes
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| SPIx_CTARn_ASC(1) // After SCK Delay Scaler (min 50 ns) = 55.56ns
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| SPIx_CTARn_DT(0) // Delay After Transfer Scaler (no minimum)= 27.78ns
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| SPIx_CTARn_CSSCK(0) // PCS to SCK Delay Scaler (min 20 ns) = 27.78ns
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| SPIx_CTARn_PBR(0) // Baud Rate Prescaler = 2
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| SPIx_CTARn_BR(0) // Baud rate (min 50ns) = 55.56ns
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};
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static GFXINLINE void acquire_bus(GDisplay *g) {
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(void)g;
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// Only the LCD is using the SPI bus, so no need to acquire
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// spiAcquireBus(&SPID1);
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spiSelect(&SPID1);
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}
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static GFXINLINE void release_bus(GDisplay *g) {
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(void)g;
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// Only the LCD is using the SPI bus, so no need to release
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// spiReleaseBus(&SPID1);
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spiUnselect(&SPID1);
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}
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static GFXINLINE void init_board(GDisplay *g) {
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(void)g;
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setPinOutput(ST7565_A0_PIN);
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writePinHigh(ST7565_A0_PIN);
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setPinOutput(ST7565_RST_PIN);
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writePinHigh(ST7565_RST_PIN);
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setPinOutput(ST7565_SS_PIN);
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palSetPadMode(PAL_PORT(ST7565_MOSI_PIN), PAL_PAD(ST7565_MOSI_PIN), PAL_MODE_ALTERNATIVE_2);
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palSetPadMode(PAL_PORT(ST7565_SCLK_PIN), PAL_PAD(ST7565_SCLK_PIN), PAL_MODE_ALTERNATIVE_2);
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spiInit();
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spiStart(&SPID1, &spi1config);
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release_bus(g);
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}
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static GFXINLINE void post_init_board(GDisplay *g) { (void)g; }
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static GFXINLINE void setpin_reset(GDisplay *g, bool_t state) {
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(void)g;
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writePin(ST7565_RST_PIN, !state);
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}
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static GFXINLINE void write_cmd(GDisplay *g, gU8 cmd) {
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(void)g;
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writePinLow(ST7565_A0_PIN);
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spiSend(&SPID1, 1, &cmd);
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}
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static GFXINLINE void write_data(GDisplay *g, gU8 *data, gU16 length) {
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(void)g;
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writePinHigh(ST7565_A0_PIN);
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spiSend(&SPID1, length, data);
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}
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#endif /* _GDISP_LLD_BOARD_H */
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