mirror of
https://github.com/Keychron/qmk_firmware.git
synced 2024-11-28 19:58:48 +06:00
127 lines
4.0 KiB
C
127 lines
4.0 KiB
C
/*
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Copyright 2012 Jun Wako <wakojun@gmail.com>
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This program is free software: you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation, either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef CONFIG_H
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#define CONFIG_H
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#define VENDOR_ID 0xFEED
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#define PRODUCT_ID 0x9898
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#define DEVICE_VER 0x0100
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#define MANUFACTURER t.m.k.
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#define PRODUCT PC98 keyboard converter
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#define DESCRIPTION converts PC98 keyboard protocol into USB
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/* matrix size */
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#define MATRIX_ROWS 16
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#define MATRIX_COLS 8
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/* To use new keymap framework */
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#define USE_KEYMAP_V2
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/* key combination for command */
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#define IS_COMMAND() ( \
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host_get_first_key() == KC_CANCEL \
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)
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/* PC98 Reset Port shared with TXD */
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#define PC98_RST_DDR DDRD
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#define PC98_RST_PORT PORTD
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#define PC98_RST_BIT 3
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/* PC98 Ready Port */
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#define PC98_RDY_DDR DDRD
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#define PC98_RDY_PORT PORTD
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#define PC98_RDY_BIT 4
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/* PC98 Retry Port */
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#define PC98_RTY_DDR DDRD
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#define PC98_RTY_PORT PORTD
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#define PC98_RTY_BIT 5
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/*
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* PC98 Serial(USART) configuration
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* asynchronous, positive logic, 19200baud, bit order: LSB first
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* 1-start bit, 8-data bit, odd parity, 1-stop bit
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*/
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/*
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* Software Serial
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*/
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#define SERIAL_SOFT_BAUD 19200
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#define SERIAL_SOFT_PARITY_ODD
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#define SERIAL_SOFT_BIT_ORDER_LSB
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#define SERIAL_SOFT_LOGIC_POSITIVE
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/* RXD Port */
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#define SERIAL_SOFT_RXD_DDR DDRD
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#define SERIAL_SOFT_RXD_PORT PORTD
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#define SERIAL_SOFT_RXD_PIN PIND
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#define SERIAL_SOFT_RXD_BIT 2
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#define SERIAL_SOFT_RXD_READ() (SERIAL_SOFT_RXD_PIN&(1<<SERIAL_SOFT_RXD_BIT))
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/* RXD Interupt */
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#define SERIAL_SOFT_RXD_VECT INT2_vect
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#define SERIAL_SOFT_RXD_INIT() do { \
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/* pin configuration: input with pull-up */ \
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SERIAL_SOFT_RXD_DDR &= ~(1<<SERIAL_SOFT_RXD_BIT); \
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SERIAL_SOFT_RXD_PORT |= (1<<SERIAL_SOFT_RXD_BIT); \
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/* enable interrupt: INT2(falling edge) */ \
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EICRA |= ((1<<ISC21)|(0<<ISC20)); \
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EIMSK |= (1<<INT2); \
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sei(); \
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} while (0)
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#define SERIAL_SOFT_RXD_INT_ENTER()
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#define SERIAL_SOFT_RXD_INT_EXIT() do { \
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/* clear interrupt flag */ \
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EIFR = (1<<INTF2); \
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} while (0)
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/* TXD Port */
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#define SERIAL_SOFT_TXD_DDR DDRD
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#define SERIAL_SOFT_TXD_PORT PORTD
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#define SERIAL_SOFT_TXD_PIN PIND
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#define SERIAL_SOFT_TXD_BIT 3
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#define SERIAL_SOFT_TXD_HI() do { SERIAL_SOFT_TXD_PORT |= (1<<SERIAL_SOFT_TXD_BIT); } while (0)
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#define SERIAL_SOFT_TXD_LO() do { SERIAL_SOFT_TXD_PORT &= ~(1<<SERIAL_SOFT_TXD_BIT); } while (0)
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#define SERIAL_SOFT_TXD_INIT() do { \
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/* pin configuration: output */ \
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SERIAL_SOFT_TXD_DDR |= (1<<SERIAL_SOFT_TXD_BIT); \
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/* idle */ \
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SERIAL_SOFT_TXD_ON(); \
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} while (0)
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/*
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* Hardware Serial(UART)
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*/
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#ifdef __AVR_ATmega32U4__
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#define SERIAL_UART_BAUD 19200
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#define SERIAL_UART_DATA UDR1
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#define SERIAL_UART_UBRR ((F_CPU/(16UL*SERIAL_UART_BAUD))-1)
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#define SERIAL_UART_RXD_VECT USART1_RX_vect
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#define SERIAL_UART_TXD_READY (UCSR1A&(1<<UDRE1))
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#define SERIAL_UART_INIT() do { \
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UBRR1L = (uint8_t) SERIAL_UART_UBRR; /* baud rate */ \
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UBRR1H = (uint8_t) (SERIAL_UART_UBRR>>8); /* baud rate */ \
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UCSR1B |= (1<<RXCIE1) | (1<<RXEN1); /* RX interrupt, RX: enable */ \
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UCSR1B |= (0<<TXCIE1) | (1<<TXEN1); /* TX interrupt, TX: enable */ \
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UCSR1C |= (1<<UPM11) | (1<<UPM10); /* parity: none(00), even(01), odd(11) */ \
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sei(); \
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} while(0)
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#else
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#error "USART configuration is needed."
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#endif
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#endif
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