mirror of
https://github.com/Keychron/qmk_firmware.git
synced 2024-11-24 17:37:40 +06:00
172e6a7030
* Extensible split data sync capability through transactions. - Split common transport has been split up between the transport layer and data layer. - Split "transactions" model used, with convergence between I2C and serial data definitions. - Slave matrix "generation count" is used to determine if the full slave matrix needs to be retrieved. - Encoders get the same "generation count" treatment. - All other blocks of data are synchronised when a change is detected. - All transmissions have a globally-configurable deadline before a transmission is forced (`FORCED_SYNC_THROTTLE_MS`, default 100ms). - Added atomicity for all core-synced data, preventing partial updates - Added retries to AVR i2c_master's i2c_start, to minimise the number of failed transactions when interrupts are disabled on the slave due to atomicity checks. - Some keyboards have had slight modifications made in order to ensure that they still build due to firmware size restrictions. * Fixup LED_MATRIX compile. * Parameterise ERROR_DISCONNECT_COUNT.
112 lines
4.2 KiB
C
112 lines
4.2 KiB
C
/* Copyright (C) 2019 Elia Ritterbusch
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+
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <https://www.gnu.org/licenses/>.
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*/
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/* Library made by: g4lvanix
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* GitHub repository: https://github.com/g4lvanix/I2C-slave-lib
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*/
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#include <stddef.h>
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#include <avr/io.h>
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#include <util/twi.h>
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#include <avr/interrupt.h>
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#include <stdbool.h>
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#include "i2c_slave.h"
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#if defined(USE_I2C) && defined(SPLIT_COMMON_TRANSACTIONS)
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# include "transactions.h"
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static volatile bool is_callback_executor = false;
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#endif // defined(USE_I2C) && defined(SPLIT_COMMON_TRANSACTIONS)
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volatile uint8_t i2c_slave_reg[I2C_SLAVE_REG_COUNT];
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static volatile uint8_t buffer_address;
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static volatile bool slave_has_register_set = false;
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void i2c_slave_init(uint8_t address) {
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// load address into TWI address register
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TWAR = address;
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// set the TWCR to enable address matching and enable TWI, clear TWINT, enable TWI interrupt
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TWCR = (1 << TWIE) | (1 << TWEA) | (1 << TWINT) | (1 << TWEN);
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}
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void i2c_slave_stop(void) {
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// clear acknowledge and enable bits
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TWCR &= ~((1 << TWEA) | (1 << TWEN));
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}
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ISR(TWI_vect) {
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uint8_t ack = 1;
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switch (TW_STATUS) {
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case TW_SR_SLA_ACK:
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// The device is now a slave receiver
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slave_has_register_set = false;
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#if defined(USE_I2C) && defined(SPLIT_COMMON_TRANSACTIONS)
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is_callback_executor = false;
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#endif // defined(USE_I2C) && defined(SPLIT_COMMON_TRANSACTIONS)
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break;
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case TW_SR_DATA_ACK:
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// This device is a slave receiver and has received data
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// First byte is the location then the bytes will be writen in buffer with auto-increment
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if (!slave_has_register_set) {
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buffer_address = TWDR;
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if (buffer_address >= I2C_SLAVE_REG_COUNT) { // address out of bounds dont ack
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ack = 0;
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buffer_address = 0;
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}
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slave_has_register_set = true; // address has been received now fill in buffer
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#if defined(USE_I2C) && defined(SPLIT_COMMON_TRANSACTIONS)
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// Work out if we're attempting to execute a callback
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is_callback_executor = buffer_address == split_transaction_table[I2C_EXECUTE_CALLBACK].initiator2target_offset;
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#endif // defined(USE_I2C) && defined(SPLIT_COMMON_TRANSACTIONS)
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} else {
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i2c_slave_reg[buffer_address] = TWDR;
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buffer_address++;
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#if defined(USE_I2C) && defined(SPLIT_COMMON_TRANSACTIONS)
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// If we're intending to execute a transaction callback, do so, as we've just received the transaction ID
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if (is_callback_executor) {
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split_transaction_desc_t *trans = &split_transaction_table[split_shmem->transaction_id];
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if (trans->slave_callback) {
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trans->slave_callback(trans->initiator2target_buffer_size, split_trans_initiator2target_buffer(trans), trans->target2initiator_buffer_size, split_trans_target2initiator_buffer(trans));
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}
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}
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#endif // defined(USE_I2C) && defined(SPLIT_COMMON_TRANSACTIONS)
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}
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break;
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case TW_ST_SLA_ACK:
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case TW_ST_DATA_ACK:
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// This device is a slave transmitter and master has requested data
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TWDR = i2c_slave_reg[buffer_address];
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buffer_address++;
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break;
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case TW_BUS_ERROR:
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// We got an error, reset i2c
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TWCR = 0;
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default:
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break;
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}
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// Reset i2c state machine to be ready for next interrupt
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TWCR |= (1 << TWIE) | (1 << TWINT) | (ack << TWEA) | (1 << TWEN);
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}
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