mirror of
https://github.com/Keychron/qmk_firmware.git
synced 2024-11-27 11:06:37 +06:00
7baaac9531
Affects: - `kabedon/kabedon98e` - `kagizaraya/chidori` - `kagizaraya/halberd` - `kagizaraya/miniaxe` - `kagizaraya/scythe` - `kakunpc/angel17/alpha` - `kakunpc/angel17/rev1` - `kakunpc/angel64/alpha` - `kakunpc/angel64/rev1` - `kakunpc/business_card/alpha` - `kakunpc/business_card/beta` - `kakunpc/choc_taro` - `kakunpc/rabbit_capture_plan` - `kakunpc/suihankey/alpha` - `kakunpc/suihankey/rev1` - `kakunpc/suihankey/split/alpha` - `kakunpc/suihankey/split/rev1` - `kakunpc/thedogkeyboard` - `kapcave/arya` - `kapcave/gskt00` - `kapcave/paladin64` - `kapl/rev1` - `kb58` - `kb_elmo/aek2_usb` - `kb_elmo/m0110a_usb` - `kb_elmo/m0116_usb` - `kbdclack/kaishi65` - `kbdfans/bella/soldered` - `kbdfans/bounce/pad` - `kbdfans/jm60` - `kbdfans/kbd19x` - `kbdfans/kbd4x` - `kbdfans/kbd66` - `kbdfans/kbd67/hotswap` - `kbdfans/kbd67/mkii_soldered` - `kbdfans/kbd6x` - `kbdfans/kbd75/rev1` - `kbdfans/kbd75/rev2` - `kbdfans/kbd8x` - `kbdfans/kbd8x_mk2` - `kbdfans/kbdpad/mk2` - `kbdfans/maja_soldered` - `kbdfans/niu_mini` - `kbdfans/phaseone` - `kbdmania/kmac` - `kbdmania/kmac_pad` - `kc60`
74 lines
2.8 KiB
C
74 lines
2.8 KiB
C
/*
|
|
Copyright 2021 KapCave
|
|
|
|
This program is free software: you can redistribute it and/or modify
|
|
it under the terms of the GNU General Public License as published by
|
|
the Free Software Foundation, either version 2 of the License, or
|
|
(at your option) any later version.
|
|
|
|
This program is distributed in the hope that it will be useful,
|
|
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
GNU General Public License for more details.
|
|
|
|
You should have received a copy of the GNU General Public License
|
|
along with this program. If not, see <http://www.gnu.org/licenses/>.
|
|
*/
|
|
#pragma once
|
|
|
|
/* Only required if you add in a trackpoint hardware to the pcb */
|
|
#ifdef PS2_DRIVER_USART
|
|
#define PS2_CLOCK_PIN D5
|
|
#define PS2_DATA_PIN D2
|
|
|
|
/* synchronous, odd parity, 1-bit stop, 8-bit data, sample at falling
|
|
* edge */
|
|
/* set DDR of CLOCK as input to be slave */
|
|
#define PS2_USART_INIT() do { \
|
|
PS2_CLOCK_DDR &= ~(1<<PS2_CLOCK_BIT); \
|
|
PS2_DATA_DDR &= ~(1<<PS2_DATA_BIT); \
|
|
UCSR1C = ((1 << UMSEL10) | \
|
|
(3 << UPM10) | \
|
|
(0 << USBS1) | \
|
|
(3 << UCSZ10) | \
|
|
(0 << UCPOL1)); \
|
|
UCSR1A = 0; \
|
|
UBRR1H = 0; \
|
|
UBRR1L = 0; \
|
|
} while (0)
|
|
#define PS2_USART_RX_INT_ON() do { \
|
|
UCSR1B = ((1 << RXCIE1) | \
|
|
(1 << RXEN1)); \
|
|
} while (0)
|
|
#define PS2_USART_RX_POLL_ON() do { \
|
|
UCSR1B = (1 << RXEN1); \
|
|
} while (0)
|
|
#define PS2_USART_OFF() do { \
|
|
UCSR1C = 0; \
|
|
UCSR1B &= ~((1 << RXEN1) | \
|
|
(1 << TXEN1)); \
|
|
} while (0)
|
|
#define PS2_USART_RX_READY (UCSR1A & (1<<RXC1))
|
|
#define PS2_USART_RX_DATA UDR1
|
|
#define PS2_USART_ERROR (UCSR1A & ((1<<FE1) | (1<<DOR1) | (1<<UPE1)))
|
|
#define PS2_USART_RX_VECT USART1_RX_vect
|
|
#endif
|
|
|
|
#ifdef PS2_DRIVER_INTERRUPT
|
|
#define PS2_CLOCK_PIN D2
|
|
#define PS2_DATA_PIN D5
|
|
|
|
#define PS2_INT_INIT() do { \
|
|
EICRA |= ((1<<ISC21) | \
|
|
(0<<ISC20)); \
|
|
} while (0)
|
|
#define PS2_INT_ON() do { \
|
|
EIMSK |= (1<<INT2); \
|
|
} while (0)
|
|
#define PS2_INT_OFF() do { \
|
|
EIMSK &= ~(1<<INT2); \
|
|
} while (0)
|
|
#define PS2_INT_VECT INT2_vect
|
|
|
|
#endif
|