mirror of
https://github.com/Keychron/qmk_firmware.git
synced 2024-11-23 00:47:02 +06:00
Keyboard: Update the serial.c of crkbd based on the helix-serial.c (#4349)
This commit is contained in:
Kosuke Adachi
Drashna Jaelre
parent
e9fd42df71
commit
756d92c1a0
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@ -1,10 +1,4 @@
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#pragma once
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/* Soft Serial defines */
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#define SERIAL_PIN_DDR DDRD
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#define SERIAL_PIN_PORT PORTD
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#define SERIAL_PIN_INPUT PIND
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#define SERIAL_PIN_MASK _BV(PD2)
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#define SERIAL_PIN_INTERRUPT INT2_vect
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#ifndef SOFT_SERIAL_PIN
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#define SOFT_SERIAL_PIN D2
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#define SERIAL_USE_MULTI_TRANSACTION
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#endif
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@ -7,8 +7,8 @@
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#include <stddef.h>
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#include <split_scomm.h>
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#include "serial.h"
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#ifdef SERIAL_DEBUG_MODE
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#include <avr/io.h>
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#ifdef CONSOLE_ENABLE
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#include <print.h>
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#endif
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uint8_t volatile serial_slave_buffer[SERIAL_SLAVE_BUFFER_LENGTH] = {0};
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@ -17,6 +17,7 @@ uint8_t volatile status_com = 0;
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uint8_t volatile status1 = 0;
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uint8_t slave_buffer_change_count = 0;
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uint8_t s_change_old = 0xff;
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uint8_t s_change_new = 0xff;
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SSTD_t transactions[] = {
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#define GET_SLAVE_STATUS 0
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@ -41,12 +42,12 @@ SSTD_t transactions[] = {
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void serial_master_init(void)
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{
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soft_serial_initiator_init(transactions);
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soft_serial_initiator_init(transactions, TID_LIMIT(transactions));
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}
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void serial_slave_init(void)
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{
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soft_serial_target_init(transactions);
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soft_serial_target_init(transactions, TID_LIMIT(transactions));
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}
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// 0 => no error
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@ -54,19 +55,37 @@ void serial_slave_init(void)
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// 2 => checksum error
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int serial_update_buffers(int master_update)
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{
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int status;
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int status, smatstatus;
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static int need_retry = 0;
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if( s_change_old != slave_buffer_change_count ) {
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status = soft_serial_transaction(GET_SLAVE_BUFFER);
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if( status == TRANSACTION_END )
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s_change_old = slave_buffer_change_count;
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if( s_change_old != s_change_new ) {
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smatstatus = soft_serial_transaction(GET_SLAVE_BUFFER);
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if( smatstatus == TRANSACTION_END ) {
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s_change_old = s_change_new;
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#ifdef CONSOLE_ENABLE
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uprintf("slave matrix = %b %b %b %b %b\n",
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serial_slave_buffer[0], serial_slave_buffer[1],
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serial_slave_buffer[2], serial_slave_buffer[3],
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serial_slave_buffer[4] );
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#endif
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}
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} else {
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// serial_slave_buffer dosen't change
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smatstatus = TRANSACTION_END; // dummy status
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}
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if( !master_update && !need_retry)
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status = soft_serial_transaction(GET_SLAVE_STATUS);
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else
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status = soft_serial_transaction(PUT_MASTER_GET_SLAVE_STATUS);
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need_retry = ( status == TRANSACTION_END ) ? 0 : 1;
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return status;
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if( !master_update && !need_retry) {
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status = soft_serial_transaction(GET_SLAVE_STATUS);
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} else {
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status = soft_serial_transaction(PUT_MASTER_GET_SLAVE_STATUS);
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}
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if( status == TRANSACTION_END ) {
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s_change_new = slave_buffer_change_count;
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need_retry = 0;
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} else {
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need_retry = 1;
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}
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return smatstatus;
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}
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#endif // SERIAL_USE_MULTI_TRANSACTION
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@ -1,4 +1,5 @@
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#pragma once
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#ifndef SPLIT_COMM_H
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#define SPLIT_COMM_H
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#ifndef SERIAL_USE_MULTI_TRANSACTION
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/* --- USE Simple API (OLD API, compatible with let's split serial.c) --- */
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@ -19,3 +20,5 @@ void serial_slave_init(void);
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int serial_update_buffers(int master_changed);
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#endif
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#endif /* SPLIT_COMM_H */
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@ -1,4 +1,5 @@
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#pragma once
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#ifndef SPLIT_KEYBOARD_UTIL_H
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#define SPLIT_KEYBOARD_UTIL_H
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#include <stdbool.h>
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#include "eeconfig.h"
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@ -14,3 +15,5 @@ void split_keyboard_setup(void);
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bool has_usb(void);
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void matrix_master_OLED_init (void);
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#endif
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@ -1,5 +1,10 @@
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/*
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* WARNING: be careful changing this code, it is very timing dependent
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*
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* 2018-10-28 checked
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* avr-gcc 4.9.2
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* avr-gcc 5.4.0
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* avr-gcc 7.3.0
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*/
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#ifndef F_CPU
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@ -14,8 +19,58 @@
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#include "serial.h"
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//#include <pro_micro.h>
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#ifdef USE_SERIAL
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#ifdef SOFT_SERIAL_PIN
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#ifdef __AVR_ATmega32U4__
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// if using ATmega32U4 I2C, can not use PD0 and PD1 in soft serial.
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#ifdef USE_I2C
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#if SOFT_SERIAL_PIN == D0 || SOFT_SERIAL_PIN == D1
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#error Using ATmega32U4 I2C, so can not use PD0, PD1
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#endif
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#endif
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#if SOFT_SERIAL_PIN >= D0 && SOFT_SERIAL_PIN <= D3
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#define SERIAL_PIN_DDR DDRD
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#define SERIAL_PIN_PORT PORTD
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#define SERIAL_PIN_INPUT PIND
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#if SOFT_SERIAL_PIN == D0
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#define SERIAL_PIN_MASK _BV(PD0)
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#define EIMSK_BIT _BV(INT0)
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#define EICRx_BIT (~(_BV(ISC00) | _BV(ISC01)))
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#define SERIAL_PIN_INTERRUPT INT0_vect
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#elif SOFT_SERIAL_PIN == D1
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#define SERIAL_PIN_MASK _BV(PD1)
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#define EIMSK_BIT _BV(INT1)
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#define EICRx_BIT (~(_BV(ISC10) | _BV(ISC11)))
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#define SERIAL_PIN_INTERRUPT INT1_vect
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#elif SOFT_SERIAL_PIN == D2
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#define SERIAL_PIN_MASK _BV(PD2)
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#define EIMSK_BIT _BV(INT2)
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#define EICRx_BIT (~(_BV(ISC20) | _BV(ISC21)))
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#define SERIAL_PIN_INTERRUPT INT2_vect
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#elif SOFT_SERIAL_PIN == D3
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#define SERIAL_PIN_MASK _BV(PD3)
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#define EIMSK_BIT _BV(INT3)
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#define EICRx_BIT (~(_BV(ISC30) | _BV(ISC31)))
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#define SERIAL_PIN_INTERRUPT INT3_vect
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#endif
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#elif SOFT_SERIAL_PIN == E6
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#define SERIAL_PIN_DDR DDRE
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#define SERIAL_PIN_PORT PORTE
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#define SERIAL_PIN_INPUT PINE
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#define SERIAL_PIN_MASK _BV(PE6)
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#define EIMSK_BIT _BV(INT6)
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#define EICRx_BIT (~(_BV(ISC60) | _BV(ISC61)))
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#define SERIAL_PIN_INTERRUPT INT6_vect
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#else
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#error invalid SOFT_SERIAL_PIN value
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#endif
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#else
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#error serial.c now support ATmega32U4 only
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#endif
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//////////////// for backward compatibility ////////////////////////////////
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#ifndef SERIAL_USE_MULTI_TRANSACTION
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/* --- USE Simple API (OLD API, compatible with let's split serial.c) */
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#if SERIAL_SLAVE_BUFFER_LENGTH > 0
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@ -42,56 +97,118 @@ SSTD_t transactions[] = {
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};
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void serial_master_init(void)
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{ soft_serial_initiator_init(transactions); }
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{ soft_serial_initiator_init(transactions, TID_LIMIT(transactions)); }
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void serial_slave_init(void)
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{ soft_serial_target_init(transactions); }
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{ soft_serial_target_init(transactions, TID_LIMIT(transactions)); }
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// 0 => no error
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// 1 => slave did not respond
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// 2 => checksum error
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int serial_update_buffers()
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{ return soft_serial_transaction(); }
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{
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int result;
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result = soft_serial_transaction();
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return result;
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}
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#endif // Simple API (OLD API, compatible with let's split serial.c)
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#endif // end of Simple API (OLD API, compatible with let's split serial.c)
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////////////////////////////////////////////////////////////////////////////
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#define ALWAYS_INLINE __attribute__((always_inline))
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#define NO_INLINE __attribute__((noinline))
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#define _delay_sub_us(x) __builtin_avr_delay_cycles(x)
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// Serial pulse period in microseconds.
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#define TID_SEND_ADJUST 14
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// parity check
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#define ODD_PARITY 1
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#define EVEN_PARITY 0
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#define PARITY EVEN_PARITY
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#define SELECT_SERIAL_SPEED 1
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#if SELECT_SERIAL_SPEED == 0
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#ifdef SERIAL_DELAY
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// custom setup in config.h
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// #define TID_SEND_ADJUST 2
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// #define SERIAL_DELAY 6 // micro sec
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// #define READ_WRITE_START_ADJUST 30 // cycles
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// #define READ_WRITE_WIDTH_ADJUST 8 // cycles
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#else
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// ============ Standard setups ============
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#ifndef SELECT_SOFT_SERIAL_SPEED
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#define SELECT_SOFT_SERIAL_SPEED 1
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// 0: about 189kbps
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// 1: about 137kbps (default)
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// 2: about 75kbps
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// 3: about 39kbps
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// 4: about 26kbps
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// 5: about 20kbps
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#endif
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#if __GNUC__ < 6
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#define TID_SEND_ADJUST 14
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#else
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#define TID_SEND_ADJUST 2
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#endif
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#if SELECT_SOFT_SERIAL_SPEED == 0
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// Very High speed
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#define SERIAL_DELAY 4 // micro sec
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#define READ_WRITE_START_ADJUST 33 // cycles
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#define READ_WRITE_WIDTH_ADJUST 3 // cycles
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#elif SELECT_SERIAL_SPEED == 1
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#if __GNUC__ < 6
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#define READ_WRITE_START_ADJUST 33 // cycles
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#define READ_WRITE_WIDTH_ADJUST 3 // cycles
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#else
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#define READ_WRITE_START_ADJUST 34 // cycles
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#define READ_WRITE_WIDTH_ADJUST 7 // cycles
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#endif
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#elif SELECT_SOFT_SERIAL_SPEED == 1
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// High speed
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#define SERIAL_DELAY 6 // micro sec
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#define READ_WRITE_START_ADJUST 30 // cycles
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#define READ_WRITE_WIDTH_ADJUST 3 // cycles
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#elif SELECT_SERIAL_SPEED == 2
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#if __GNUC__ < 6
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#define READ_WRITE_START_ADJUST 30 // cycles
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#define READ_WRITE_WIDTH_ADJUST 3 // cycles
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#else
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#define READ_WRITE_START_ADJUST 33 // cycles
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#define READ_WRITE_WIDTH_ADJUST 7 // cycles
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#endif
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#elif SELECT_SOFT_SERIAL_SPEED == 2
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// Middle speed
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#define SERIAL_DELAY 12 // micro sec
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#define READ_WRITE_START_ADJUST 30 // cycles
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#define READ_WRITE_WIDTH_ADJUST 3 // cycles
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#elif SELECT_SERIAL_SPEED == 3
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#if __GNUC__ < 6
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#define READ_WRITE_WIDTH_ADJUST 3 // cycles
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#else
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#define READ_WRITE_WIDTH_ADJUST 7 // cycles
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#endif
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#elif SELECT_SOFT_SERIAL_SPEED == 3
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// Low speed
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#define SERIAL_DELAY 24 // micro sec
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#define READ_WRITE_START_ADJUST 30 // cycles
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#define READ_WRITE_WIDTH_ADJUST 3 // cycles
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#elif SELECT_SERIAL_SPEED == 4
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#if __GNUC__ < 6
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#define READ_WRITE_WIDTH_ADJUST 3 // cycles
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#else
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#define READ_WRITE_WIDTH_ADJUST 7 // cycles
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#endif
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#elif SELECT_SOFT_SERIAL_SPEED == 4
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// Very Low speed
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#define SERIAL_DELAY 50 // micro sec
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#define SERIAL_DELAY 36 // micro sec
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#define READ_WRITE_START_ADJUST 30 // cycles
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#define READ_WRITE_WIDTH_ADJUST 3 // cycles
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#if __GNUC__ < 6
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#define READ_WRITE_WIDTH_ADJUST 3 // cycles
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#else
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#define READ_WRITE_WIDTH_ADJUST 7 // cycles
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#endif
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#elif SELECT_SOFT_SERIAL_SPEED == 5
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// Ultra Low speed
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#define SERIAL_DELAY 48 // micro sec
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#define READ_WRITE_START_ADJUST 30 // cycles
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#if __GNUC__ < 6
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#define READ_WRITE_WIDTH_ADJUST 3 // cycles
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#else
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#define READ_WRITE_WIDTH_ADJUST 7 // cycles
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#endif
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#else
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#error Illegal Serial Speed
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#endif
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#error invalid SELECT_SOFT_SERIAL_SPEED value
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#endif /* SELECT_SOFT_SERIAL_SPEED */
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#endif /* SERIAL_DELAY */
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#define SERIAL_DELAY_HALF1 (SERIAL_DELAY/2)
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#define SERIAL_DELAY_HALF2 (SERIAL_DELAY - SERIAL_DELAY/2)
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@ -105,17 +222,21 @@ int serial_update_buffers()
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#endif
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static SSTD_t *Transaction_table = NULL;
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static uint8_t Transaction_table_size = 0;
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inline static void serial_delay(void) ALWAYS_INLINE;
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inline static
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void serial_delay(void) {
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_delay_us(SERIAL_DELAY);
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}
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inline static void serial_delay_half1(void) ALWAYS_INLINE;
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inline static
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void serial_delay_half1(void) {
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_delay_us(SERIAL_DELAY_HALF1);
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}
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inline static void serial_delay_half2(void) ALWAYS_INLINE;
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inline static
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void serial_delay_half2(void) {
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_delay_us(SERIAL_DELAY_HALF2);
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@ -135,6 +256,7 @@ void serial_input_with_pullup(void) {
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SERIAL_PIN_PORT |= SERIAL_PIN_MASK;
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}
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inline static uint8_t serial_read_pin(void) ALWAYS_INLINE;
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inline static
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uint8_t serial_read_pin(void) {
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return !!(SERIAL_PIN_INPUT & SERIAL_PIN_MASK);
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@ -152,30 +274,28 @@ void serial_high(void) {
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SERIAL_PIN_PORT |= SERIAL_PIN_MASK;
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}
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void soft_serial_initiator_init(SSTD_t *sstd_table)
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void soft_serial_initiator_init(SSTD_t *sstd_table, int sstd_table_size)
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{
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Transaction_table = sstd_table;
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Transaction_table_size = (uint8_t)sstd_table_size;
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serial_output();
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serial_high();
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}
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void soft_serial_target_init(SSTD_t *sstd_table)
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void soft_serial_target_init(SSTD_t *sstd_table, int sstd_table_size)
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{
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Transaction_table = sstd_table;
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Transaction_table_size = (uint8_t)sstd_table_size;
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serial_input_with_pullup();
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#if SERIAL_PIN_MASK == _BV(PD0)
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// Enable INT0
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EIMSK |= _BV(INT0);
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// Trigger on falling edge of INT0
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EICRA &= ~(_BV(ISC00) | _BV(ISC01));
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#elif SERIAL_PIN_MASK == _BV(PD2)
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// Enable INT2
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EIMSK |= _BV(INT2);
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// Trigger on falling edge of INT2
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EICRA &= ~(_BV(ISC20) | _BV(ISC21));
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// Enable INT0-INT3,INT6
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EIMSK |= EIMSK_BIT;
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#if SERIAL_PIN_MASK == _BV(PE6)
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// Trigger on falling edge of INT6
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EICRB &= EICRx_BIT;
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#else
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#error unknown SERIAL_PIN_MASK value
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// Trigger on falling edge of INT0-INT3
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EICRA &= EICRx_BIT;
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#endif
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}
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@ -191,7 +311,7 @@ void sync_recv(void) {
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}
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// Used by the reciver to send a synchronization signal to the sender.
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static void sync_send(void)NO_INLINE;
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static void sync_send(void) NO_INLINE;
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static
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void sync_send(void) {
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serial_low();
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@ -205,12 +325,12 @@ static uint8_t serial_read_chunk(uint8_t *pterrcount, uint8_t bit) {
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uint8_t byte, i, p, pb;
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_delay_sub_us(READ_WRITE_START_ADJUST);
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for( i = 0, byte = 0, p = 0; i < bit; i++ ) {
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for( i = 0, byte = 0, p = PARITY; i < bit; i++ ) {
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serial_delay_half1(); // read the middle of pulses
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if( serial_read_pin() ) {
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byte = (byte << 1) | 1; p ^= 1;
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byte = (byte << 1) | 1; p ^= 1;
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} else {
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byte = (byte << 1) | 0; p ^= 0;
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byte = (byte << 1) | 0; p ^= 0;
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}
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_delay_sub_us(READ_WRITE_WIDTH_ADJUST);
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serial_delay_half2();
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@ -230,13 +350,13 @@ static uint8_t serial_read_chunk(uint8_t *pterrcount, uint8_t bit) {
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|||
void serial_write_chunk(uint8_t data, uint8_t bit) NO_INLINE;
|
||||
void serial_write_chunk(uint8_t data, uint8_t bit) {
|
||||
uint8_t b, p;
|
||||
for( p = 0, b = 1<<(bit-1); b ; b >>= 1) {
|
||||
if(data & b) {
|
||||
serial_high(); p ^= 1;
|
||||
} else {
|
||||
serial_low(); p ^= 0;
|
||||
}
|
||||
serial_delay();
|
||||
for( p = PARITY, b = 1<<(bit-1); b ; b >>= 1) {
|
||||
if(data & b) {
|
||||
serial_high(); p ^= 1;
|
||||
} else {
|
||||
serial_low(); p ^= 0;
|
||||
}
|
||||
serial_delay();
|
||||
}
|
||||
/* send parity bit */
|
||||
if(p & 1) { serial_high(); }
|
||||
|
|
@ -288,6 +408,13 @@ void change_reciver2sender(void) {
|
|||
serial_delay_half1(); //4
|
||||
}
|
||||
|
||||
static inline uint8_t nibble_bits_count(uint8_t bits)
|
||||
{
|
||||
bits = (bits & 0x5) + (bits >> 1 & 0x5);
|
||||
bits = (bits & 0x3) + (bits >> 2 & 0x3);
|
||||
return bits;
|
||||
}
|
||||
|
||||
// interrupt handle to be used by the target device
|
||||
ISR(SERIAL_PIN_INTERRUPT) {
|
||||
|
||||
|
|
@ -297,12 +424,15 @@ ISR(SERIAL_PIN_INTERRUPT) {
|
|||
SSTD_t *trans = Transaction_table;
|
||||
#else
|
||||
// recive transaction table index
|
||||
uint8_t tid;
|
||||
uint8_t tid, bits;
|
||||
uint8_t pecount = 0;
|
||||
sync_recv();
|
||||
tid = serial_read_chunk(&pecount,4);
|
||||
if(pecount> 0)
|
||||
bits = serial_read_chunk(&pecount,7);
|
||||
tid = bits>>3;
|
||||
bits = (bits&7) != nibble_bits_count(tid);
|
||||
if( bits || pecount> 0 || tid > Transaction_table_size ) {
|
||||
return;
|
||||
}
|
||||
serial_delay_half1();
|
||||
|
||||
serial_high(); // response step1 low->high
|
||||
|
|
@ -315,17 +445,17 @@ ISR(SERIAL_PIN_INTERRUPT) {
|
|||
// target send phase
|
||||
if( trans->target2initiator_buffer_size > 0 )
|
||||
serial_send_packet((uint8_t *)trans->target2initiator_buffer,
|
||||
trans->target2initiator_buffer_size);
|
||||
trans->target2initiator_buffer_size);
|
||||
// target switch to input
|
||||
change_sender2reciver();
|
||||
|
||||
// target recive phase
|
||||
if( trans->initiator2target_buffer_size > 0 ) {
|
||||
if (serial_recive_packet((uint8_t *)trans->initiator2target_buffer,
|
||||
trans->initiator2target_buffer_size) ) {
|
||||
*trans->status = TRANSACTION_ACCEPTED;
|
||||
trans->initiator2target_buffer_size) ) {
|
||||
*trans->status = TRANSACTION_ACCEPTED;
|
||||
} else {
|
||||
*trans->status = TRANSACTION_DATA_ERROR;
|
||||
*trans->status = TRANSACTION_DATA_ERROR;
|
||||
}
|
||||
} else {
|
||||
*trans->status = TRANSACTION_ACCEPTED;
|
||||
|
|
@ -349,6 +479,8 @@ int soft_serial_transaction(void) {
|
|||
SSTD_t *trans = Transaction_table;
|
||||
#else
|
||||
int soft_serial_transaction(int sstd_index) {
|
||||
if( sstd_index > Transaction_table_size )
|
||||
return TRANSACTION_TYPE_ERROR;
|
||||
SSTD_t *trans = &Transaction_table[sstd_index];
|
||||
#endif
|
||||
cli();
|
||||
|
|
@ -375,9 +507,10 @@ int soft_serial_transaction(int sstd_index) {
|
|||
|
||||
#else
|
||||
// send transaction table index
|
||||
int tid = (sstd_index<<3) | (7 & nibble_bits_count(sstd_index));
|
||||
sync_send();
|
||||
_delay_sub_us(TID_SEND_ADJUST);
|
||||
serial_write_chunk(sstd_index, 4);
|
||||
serial_write_chunk(tid, 7);
|
||||
serial_delay_half1();
|
||||
|
||||
// wait for the target response (step1 low->high)
|
||||
|
|
@ -389,12 +522,12 @@ int soft_serial_transaction(int sstd_index) {
|
|||
// check if the target is present (step2 high->low)
|
||||
for( int i = 0; serial_read_pin(); i++ ) {
|
||||
if (i > SLAVE_INT_ACK_WIDTH + 1) {
|
||||
// slave failed to pull the line low, assume not present
|
||||
serial_output();
|
||||
serial_high();
|
||||
*trans->status = TRANSACTION_NO_RESPONSE;
|
||||
sei();
|
||||
return TRANSACTION_NO_RESPONSE;
|
||||
// slave failed to pull the line low, assume not present
|
||||
serial_output();
|
||||
serial_high();
|
||||
*trans->status = TRANSACTION_NO_RESPONSE;
|
||||
sei();
|
||||
return TRANSACTION_NO_RESPONSE;
|
||||
}
|
||||
_delay_sub_us(SLAVE_INT_ACK_WIDTH_UNIT);
|
||||
}
|
||||
|
|
@ -404,12 +537,12 @@ int soft_serial_transaction(int sstd_index) {
|
|||
// if the target is present syncronize with it
|
||||
if( trans->target2initiator_buffer_size > 0 ) {
|
||||
if (!serial_recive_packet((uint8_t *)trans->target2initiator_buffer,
|
||||
trans->target2initiator_buffer_size) ) {
|
||||
serial_output();
|
||||
serial_high();
|
||||
*trans->status = TRANSACTION_DATA_ERROR;
|
||||
sei();
|
||||
return TRANSACTION_DATA_ERROR;
|
||||
trans->target2initiator_buffer_size) ) {
|
||||
serial_output();
|
||||
serial_high();
|
||||
*trans->status = TRANSACTION_DATA_ERROR;
|
||||
sei();
|
||||
return TRANSACTION_DATA_ERROR;
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -419,7 +552,7 @@ int soft_serial_transaction(int sstd_index) {
|
|||
// initiator send phase
|
||||
if( trans->initiator2target_buffer_size > 0 ) {
|
||||
serial_send_packet((uint8_t *)trans->initiator2target_buffer,
|
||||
trans->initiator2target_buffer_size);
|
||||
trans->initiator2target_buffer_size);
|
||||
}
|
||||
|
||||
// always, release the line when not in use
|
||||
|
|
@ -442,3 +575,16 @@ int soft_serial_get_and_clean_status(int sstd_index) {
|
|||
#endif
|
||||
|
||||
#endif
|
||||
|
||||
// Helix serial.c history
|
||||
// 2018-1-29 fork from let's split and add PD2, modify sync_recv() (#2308, bceffdefc)
|
||||
// 2018-6-28 bug fix master to slave comm and speed up (#3255, 1038bbef4)
|
||||
// (adjusted with avr-gcc 4.9.2)
|
||||
// 2018-7-13 remove USE_SERIAL_PD2 macro (#3374, f30d6dd78)
|
||||
// (adjusted with avr-gcc 4.9.2)
|
||||
// 2018-8-11 add support multi-type transaction (#3608, feb5e4aae)
|
||||
// (adjusted with avr-gcc 4.9.2)
|
||||
// 2018-10-21 fix serial and RGB animation conflict (#4191, 4665e4fff)
|
||||
// (adjusted with avr-gcc 7.3.0)
|
||||
// 2018-10-28 re-adjust compiler depend value of delay (#4269, 8517f8a66)
|
||||
// (adjusted with avr-gcc 5.4.0, 7.3.0)
|
||||
|
|
|
|||
|
|
@ -1,16 +1,19 @@
|
|||
#pragma once
|
||||
#ifndef SOFT_SERIAL_H
|
||||
#define SOFT_SERIAL_H
|
||||
|
||||
#include <stdbool.h>
|
||||
|
||||
// /////////////////////////////////////////////////////////////////
|
||||
// Need Soft Serial defines in serial_config.h
|
||||
// Need Soft Serial defines in config.h
|
||||
// /////////////////////////////////////////////////////////////////
|
||||
// ex.
|
||||
// #define SERIAL_PIN_DDR DDRD
|
||||
// #define SERIAL_PIN_PORT PORTD
|
||||
// #define SERIAL_PIN_INPUT PIND
|
||||
// #define SERIAL_PIN_MASK _BV(PD?) ?=0,2
|
||||
// #define SERIAL_PIN_INTERRUPT INT?_vect ?=0,2
|
||||
// #define SOFT_SERIAL_PIN ?? // ?? = D0,D1,D2,D3,E6
|
||||
// OPTIONAL: #define SELECT_SOFT_SERIAL_SPEED ? // ? = 1,2,3,4,5
|
||||
// // 1: about 137kbps (default)
|
||||
// // 2: about 75kbps
|
||||
// // 3: about 39kbps
|
||||
// // 4: about 26kbps
|
||||
// // 5: about 20kbps
|
||||
//
|
||||
// //// USE Simple API (OLD API, compatible with let's split serial.c)
|
||||
// ex.
|
||||
|
|
@ -46,16 +49,18 @@ typedef struct _SSTD_t {
|
|||
uint8_t target2initiator_buffer_size;
|
||||
uint8_t *target2initiator_buffer;
|
||||
} SSTD_t;
|
||||
#define TID_LIMIT( table ) (sizeof(table) / sizeof(SSTD_t))
|
||||
|
||||
// initiator is transaction start side
|
||||
void soft_serial_initiator_init(SSTD_t *sstd_table);
|
||||
void soft_serial_initiator_init(SSTD_t *sstd_table, int sstd_table_size);
|
||||
// target is interrupt accept side
|
||||
void soft_serial_target_init(SSTD_t *sstd_table);
|
||||
void soft_serial_target_init(SSTD_t *sstd_table, int sstd_table_size);
|
||||
|
||||
// initiator resullt
|
||||
#define TRANSACTION_END 0
|
||||
#define TRANSACTION_NO_RESPONSE 0x1
|
||||
#define TRANSACTION_DATA_ERROR 0x2
|
||||
#define TRANSACTION_TYPE_ERROR 0x4
|
||||
#ifndef SERIAL_USE_MULTI_TRANSACTION
|
||||
int soft_serial_transaction(void);
|
||||
#else
|
||||
|
|
@ -71,7 +76,9 @@ int soft_serial_transaction(int sstd_index);
|
|||
// target:
|
||||
// TRANSACTION_DATA_ERROR
|
||||
// or TRANSACTION_ACCEPTED
|
||||
#define TRANSACTION_ACCEPTED 0x4
|
||||
#define TRANSACTION_ACCEPTED 0x8
|
||||
#ifdef SERIAL_USE_MULTI_TRANSACTION
|
||||
int soft_serial_get_and_clean_status(int sstd_index);
|
||||
#endif
|
||||
|
||||
#endif /* SOFT_SERIAL_H */
|
||||
|
|
|
|||
Loading…
Reference in New Issue
Block a user