mirror of
https://github.com/Keychron/qmk_firmware.git
synced 2024-11-30 20:56:32 +06:00
79 lines
2.8 KiB
C
79 lines
2.8 KiB
C
/* Copyright 2020 QMK
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#pragma once
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#include_next <mcuconf.h>
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#undef STM32_NO_INIT
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#undef STM32_HSI_ENABLED
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#undef STM32_LSI_ENABLED
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#undef STM32_HSE_ENABLED
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#undef STM32_LSE_ENABLED
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#undef STM32_CLOCK48_REQUIRED
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#undef STM32_SW
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#undef STM32_PLLSRC
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#undef STM32_PLLM_VALUE
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#undef STM32_PLLN_VALUE
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#undef STM32_PLLP_VALUE
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#undef STM32_PLLQ_VALUE
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#undef STM32_HPRE
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#undef STM32_PPRE1
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#undef STM32_PPRE2
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#undef STM32_RTCSEL
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#undef STM32_RTCPRE_VALUE
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#undef STM32_MCO1SEL
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#undef STM32_MCO1PRE
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#undef STM32_MCO2SEL
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#undef STM32_MCO2PRE
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#undef STM32_I2SSRC
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#undef STM32_PLLI2SN_VALUE
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#undef STM32_PLLI2SR_VALUE
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#undef STM32_PVD_ENABLE
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#undef STM32_PLS
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#undef STM32_BKPRAM_ENABLE
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#define STM32_NO_INIT FALSE
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#define STM32_HSI_ENABLED TRUE
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#define STM32_LSI_ENABLED TRUE
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#define STM32_HSE_ENABLED TRUE
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#define STM32_LSE_ENABLED FALSE
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#define STM32_CLOCK48_REQUIRED TRUE
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#define STM32_SW STM32_SW_PLL
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#define STM32_PLLSRC STM32_PLLSRC_HSE
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#define STM32_PLLM_VALUE 8
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#define STM32_PLLN_VALUE 192
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#define STM32_PLLP_VALUE 4
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#define STM32_PLLQ_VALUE 4
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// AHB prescaler value.
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#define STM32_HPRE STM32_HPRE_DIV1
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//APB1 prescaler value.
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#define STM32_PPRE1 STM32_PPRE1_DIV4
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//APB2 prescaler value.
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#define STM32_PPRE2 STM32_PPRE2_DIV2
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#define STM32_RTCSEL STM32_RTCSEL_LSI
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#define STM32_RTCPRE_VALUE 8
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#define STM32_MCO1SEL STM32_MCO1SEL_HSI
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#define STM32_MCO1PRE STM32_MCO1PRE_DIV1
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#define STM32_MCO2SEL STM32_MCO2SEL_SYSCLK
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#define STM32_MCO2PRE STM32_MCO2PRE_DIV5
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#define STM32_I2SSRC STM32_I2SSRC_CKIN
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#define STM32_PLLI2SN_VALUE 192
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#define STM32_PLLI2SR_VALUE 5
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#define STM32_PVD_ENABLE FALSE
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#define STM32_PLS STM32_PLS_LEV0
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#define STM32_BKPRAM_ENABLE FALSE
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